1. Field Of The Invention
This invention relates to a floating gate MOS transistor and, more particularly, to a floating gate MOS transistor constructed with a single layer of polysilicon which allows the MOS transistor to be fabricated with and coupled to a bipolar sensing transistor for forming a high speed, reprogrammable EEPROM.
2. Description of The Relevant Art
Conventional programmable memory elements can be divided into two categories: MOS devices and bipolar devices. In the first category, a floating gate MOSFET is combined with other MOSFETS which act as the active sensing devices. The floating gate MOSFET is reprogrammable, but EEPROMS fabricated with MOS devices are inherently slow. In the second category. bipolar integrated circuit non-volatile memory cells are usually constructed using some variation of a fuse technology. That is, each possible current path through the device comprises a fuse which is selectively blown to provide a permanently programmed device. One disadvantage of this technology is that the circuits require a large current to blow the fuse. Bipolar integrated circuits also have the disadvantage that, since they are programmed by blowing fuses, they are not reprogrammable, and the devices cannot be test-programmed without destroying them for other purposes.
Unfortunately, significant structural differences exist between bipolar devices and MOS devices, precluding the techniques used for fabrication of one type of device from being used to fabricate the other type of device. For example, the thin gate oxide and interpoly oxide layers used in conventional floating gate MOS devices are subject to contamination and mechanical damage when formed by bipolar fabrication methods, and the performance of bipolar devices frequently suffers when subjected to MOS fabrication methods. Consequently, the combination of technologies has not been successfully realized.